A stack of switching elements can be used as passive components for antenna tuning and various other radio frequency (RF) switching applications. The switching elements in the stack are coupled in series. The stack configuration enables a number of functions, including voltage and power handling capacity. For example, a FET (field-effect transistor) stack can be utilized to allow an RF switch to withstand high power under mismatch.
In many implementations, the voltage handling capability of a FET stack in an off state is a function of the number of FETs included in the stack. Typically, the voltage handling capacity of the stack increases as the number of FETs in the stack increases. However, simply increasing the number of FETs in a stack can have drawbacks. For example, the parasitic capacitance (Coff) of a stack is the capacitance of the stack when all of the FETs in the stack are each in an off state. Each FET in a stack contributes to the parasitic capacitance (Coff) that the stack inadvertently couples to the surrounding components. As such, each additional FET typically increases the parasitic capacitance (Coff) of the stack.
In many RF applications, there is a desire to control or carefully manage the parasitic capacitance (Coff) of the stack because of the drawbacks associated with the parasitic capacitance (Coff). For example, the parasitic capacitance (Coff) can adversely affect tuning and impedance matching. Tight tolerances for the parasitic capacitance (Coff) are often particularly important to downstream manufacturers that precisely tune and/or impedance-match antenna elements coupled to other components through one or more stack-based switches. Additionally, the resistance of the stack in the “on” state (Ron) is typically inversely related to the parasitic capacitance (Coff). As such, lowering the parasitic capacitance (Coff) typically increases the resistance (Ron).
In accordance with common practice various features shown in the drawings may not be drawn to scale, as the dimensions of various features may be arbitrarily expanded or reduced for clarity. Moreover, the drawings may not depict all of the aspects and/or variants of a given system, method or device admitted by the specification. Finally, like reference numerals are used to denote like features throughout the specification and figures.